This invention relates to the field of data communications and, more particularly, to a system and method for communicating data among a plurality of digital signal processors.
Many hardware devices use a pool of digital signal processors (DSPs) to support processing or communication applications. When an application requires more than one DSP, the DSPs must communicate data to one another to support the application. Unfortunately, existing inter-processor communication techniques either require expensive switching devices to govern communications between the DSPs or link the DSPs to one another in an arrangement that limits the functionality or performance of the DSPs.
From the foregoing, a need has arisen for a system and method for communicating data among digital signal processors (DSPs) that does not require an expensive switching device, limit the DSPs"" functionality, or degrade the DSPs"" performance. In accordance with the present invention, a system and method for communicating data among a plurality of DSPs is provided that substantially eliminates or reduces disadvantages or problems associated with previously developed systems and methods.
In one embodiment, a system for communicating data among digital signal processors (DSPs) includes DSPs and a shift register. Each DSP includes a transmit node that communicates data and a receive node that receives data. The shift register includes an input node coupled to the transmit node of each DSP and an output node coupled to the receive node of each DSP. The input node receives data from the transmit node of each DSP, and the output node communicates the data received at the input node to the receive node of each DSP.
In another embodiment, a system for communicating data among a plurality of DSPs includes DSPs and shift registers. Each DSP includes a transmit node that communicates data and a receive node that receives data. Each shift register, associated with a subset of the DSPs, receives data from a first DSP and communicates the data to a second DSP in the associated subset.
Technical advantages of the present invention include a system and method for communicating data among DSPs. By using a shift register to communicate data among the DSPs, a hardware device may avoid more expensive inter-processor communication solutions, such as a time division multiplexing switch. In addition, the shift register allows the DSPs to communicate data directly to one another without introducing significant propagation delays, and thus, improves the throughput (or rate of communication) of the inter-processor communication link. For these and other readily apparent reasons, the present invention represents a significance advance over prior systems and methods.
For a more complete understanding of the present invention, and for further features and advantages, reference is now made to the following description, taken in conjunction with the accompanying drawings, in which:
FIG. 1 illustrates a device including DSPs that communicate data to one another using an inter-processor communication link;
FIG. 2 illustrates a system for communicating data among DSPs using a shift register;
FIG. 3 is a timing diagram demonstrating a method of dividing an inter-processor communication link into a plurality of time periods using a frame synchronization signal and a clock signal;
FIG. 4 illustrates a system for communicating data among two or more subsets of DSPs using two or more shift registers; and
FIG. 5 is a flow chart illustrating a method of communicating data from a first DSP to a second DSP using a shift register.